1. Field of the Invention
The present invention relates to an electrically rewritable nonvolatile semiconductor memory device and a method of manufacturing the same.
2. Description of the Related Art
Conventionally, an LSI is formed by integrating elements in a two-dimensional plane on a silicon substrate. It is common practice to increase a storage capacity of memory by reducing dimensions of (miniaturizing) an element. However, in recent years, even this miniaturization is becoming difficult in terms of cost and technology. Improvements in photolithographic technology are necessary for miniaturization, but costs required for lithographic processes are steadily increasing. Moreover, even if miniaturization is achieved, it is expected that physical limitations such as those of withstand voltage between elements will be encountered, unless the drive voltage and so on are scaled. In other words, there is a high possibility that operation as a device will become difficult.
Accordingly, in recent years, there is proposed a semiconductor memory device in which memory cells are disposed three-dimensionally in order to increase a degree of integration of memory (refer to patent document 1: Japanese Unexamined Patent Application Publication No. 2007-266143).
One conventional semiconductor memory device in which memory cells are disposed three-dimensionally uses transistors with a cylindrical column-shaped structure (patent document 1). The semiconductor memory device using the transistors with the cylindrical column-shaped structure is provided with multi-layers conductive layer configured to form gate electrodes, and pillar-shaped columnar semiconductors. The columnar semiconductor functions as a channel (body) portion of the transistors. A vicinity of the columnar semiconductor is provided with a memory gate insulating layer. A configuration including these conductive layer, columnar semiconductor, and memory gate insulating layer is called a memory string.
In a case that the above-described conventional technology is used for further integrating, a length of the columnar semiconductor increases. Consequently, a cell current needs to be increased. At the same time, there is a need to reduce leak current from a non-selected memory string to secure a read margin.